ARM is the most successful microprocessor architecture on the planet, with its licensees sending billions of chips a year. But in recent years a rival called RISC-V has emerged, a new type of royalty-free architecture initiated by academics. Its advocates are organizing an event in the heart of Silicon Valley to promote the growth of rival chip architecture.
This week, 2,000 engineers and other professionals will attend the RISC-V Summit in San Jose, California. RISC-V leaders argued that the architecture, which allows members to design processors and other chips that are compatible with the software designed for it, goes beyond their academic roots.
Arm, the Cambridge-based company, England, has been around for decades and its designs are used in everything from smartphones to servers. Its customers have sent more than 150 billion chips to date. And the pace is accelerating: the company aims for 50 billion chips in the next two years. But some chip companies and startups like SiFive want to have more design freedom and lower licensing costs than Arm can provide.
RISC-V began in 2010 at the Peer Lab Project at the University of California at Berkeley, which needed an instruction set architecture that was simple, efficient, extensible and had no restrictions to share with others. Then Krste Asanovic (founder of SiFive), Andrew Waterman, Yunsup Lee and David Patterson created RISC-V. They built their first chip in 2011. In 2014, they announced it and gave it to the community.
In an interview, Patterson (a former computer science professor at UC Berkeley and current distinguished Google engineer) said that the original motivation was to experiment more with chip design because Moore's Law, the prediction that the number of transistors in a chip doubles every two years, the speed was slowing down. If advances in manufacturing can no longer generate gains in chip productivity, then chip designers must move forward and deliver better results with smart chip designs that yield better chip performance, Patterson said.
The academic group was inspired by what Linux had achieved with open source software. But there was no equivalent in open source hardware. When academics discovered that they could not obtain economic licenses to continue their research, they decided to make their own architecture, the framework for entire families and generations of processors. They wanted to do for hardware what Linux did for software.
“This is what happened in the software. There are open and proprietary versions. There were times when people thought proprietary software was a monopoly, ”said Patterson. “We had no choice. We had to use that. I think it's healthy to have both. And it also puts some pressure on proprietary competition. If there is no alternative for them, then that probably stifles innovation and is bad for people in the ecosystem. So I think it's healthier for customers and probably healthier for businesses to have competition. "
Patterson is a legendary figure of the microprocessor wars of the 1980s and 1990s. He was co-inventor of RISC, or reduced instruction set computing, and argued against CISC, or complex instruction set computing. Companies such as Arm, Sun Microsystems and Mips (initiated by the co-author of Patterson's computer science textbook and former president of Stanford University, John Hennessey) adopted RISC, while Intel focused on CISC. While Intel won the PC war, RISC remains the winner thanks to Arm's smartphone domain.
Now Patterson and his academic colleagues at Berkeley are involved in a battle to unseat Arm.
"We were always jealous at universities that you could get an industrial software that was open," Patterson said. “But when it came to hardware, it was proprietary. Now, with RISC-V, we get the same kind of benefit. It helps educationally and helps the competition. ”
Although they played with the idea for decades, the upstarts finally started the RISC-V Foundation as an independent non-profit organization in 2015. It is not an open source processor. It is an open specification, and because it is open, members can create their own open source cores for processors.
In 2016, Nvidia announced that it would use RISC-V as a controller in its graphics processing units (GPUs). Nvidia is now sending millions of those chips. That said, on such chips, RISC-V probably handles smaller tasks like a built-in control processor, while the device still uses an ARM design as the main processor. In 2017, Western Digital said it would move its entire product line to RISC-V, and has opened its cores. Last year, the group had its first summit, and this week, the second summit is happening.
"The original specifications have now been ratified and here we are at the second summit," Asanovic said in an opening speech. "It's not because it's 10% faster. It's because it's a new business model."
In the old days, chip designers had to choose the seller to make their chip. With RISC-V, you can select RISC-V and then "all suppliers compete for your business," said Asanovic. "You can add your own extensions without obtaining permission."
In addition, chip giants such as Intel find it difficult to keep up with Moore's Law only through manufacturing advances. That is putting more pressure on designers to create application-specific processors to compensate for the slowdown, Patterson said. But owners of instruction sets, such as Arm, are not motivated to allow such customization because it can lead to fragmentation. Arm recently moved to allow customization this year, long after RISC-V debuted.
Semico Research estimated that 62.4 billion RISC-V cores will be shipped in 2025. It's not just for microcontrollers, he said. There is demand for each level of performance, Asanovic said.
"The success is excellent, and it is a big problem to have it," he said. “The ISA foundation is in place. This is basically taking over the industry. "
What the arm thinks
The arm is not impressed. "Arm represents more than an instruction set architecture," an arm spokesman told VentureBeat. “Arm offers a product roadmap, which supports a wide range of applications and a proven track record of enabling our partners to successfully address the long-term needs of the market. Arm's shared success model, combined with the world's largest and most open computing tools, services and software ecosystem, has resulted in our partners sending more than 150 billion ARM-based chips to date in a path to a billion connected devices by 2035 ".
In October, I asked Simon Segars, CEO of Arm, about RISC-V in an interview during the Arm conference at the same convention center. At that time, Segars had just announced personalized instructions, which seemed like a nod in the direction of the flexibility offered by RISC-V. He said the following:
The way we see it is that: the chip design is evolving in several ways in parallel. There is consolidation among large chip companies, producing great players who are investing in the forefront. They have the size and scale to build very complex devices. You have some OEMs that want to build chips. You have several smaller companies that are looking for ways to create much more optimized things for specific applications, especially in this world of IoT. There is a range of different solutions to know how people can expand the capacity of what an ARM processor does based on the workload.
Our inclusion of custom instructions is based on market feedback. In some areas that have a dedicated accelerator sitting on the memory map or sitting like a coprocessor, that works very well. There are some other applications where making that final optimization can make a big difference. We have listened to the market. We have thought a lot about how to add that flexibility and maintain the benefits we have had for our entire history of standardization and that great software ecosystem we have developed. This seems to be a good way to address all those needs. It is really driven by the needs of the market more than anything else.
The leaders of the RISC-V Foundation talked about being an alternative, but also acknowledged that competition with Arm is not as severe as it might seem. After all, many chips could have smaller RISC-V control processors along with main ARM processors, said Alessandro Piovaccari, chief technology officer at Silicon Labs, in an interview with VentureBeat.
"The arm is not our role model," said Asanovic. “I would say it would be a disappointing ambition. It's much more important than replacing a company. "
Patterson added: "That would be like saying we are going after Intel. Our high-end things will probably compete in the cloud with x86 in the cloud. But we are not trying to destroy any of the companies."
The rapid growth of the RISC-V Foundation
But if there is an opportunity, it is in the new semiconductor markets, such as Internet of Things (IoT).
"You will see how many members have joined this revolution, and it is a revolution," said Calista Redmond, CEO of the RISC-V Foundation, in an opening talk at the summit. "I am signing about two membership agreements per day. In China, we are seeing hundreds of people joining. Welcome to the revolution. There has never been a better time to design a microprocessor."
Redmond said the group now has 435 companies in the RISC-V Foundation. 44 of them are chip companies, nine are input-output companies, 32 are research groups in universities, 25 are software companies, 31 are service companies and the rest are from various industries. Commercial tool providers are supporting it. In an interview with VentureBeat, he said that growth has not happened with other architectures in years.
And board members predict that the group will increase its membership by 50% in 2020. By 2021, billions of cores are expected to be sent using the RISC-V architecture, said Zvonimir Bandic, a member of the board of the foundation and senior technical director of Western Digital.
Europe and India have also hosted conferences. The Shakti Project in India has financed six processor design projects. And RISC-V has been designated the National Architecture of India and Pakistan. In Pakistan, a meeting attracted 3,000 people. The meetings have attracted more than 2,000 people.
An event in Tokyo attracted 360 registered attendees. In North America, companies that send millions of cores include Nvidia, Western Digital and SiFive. The foundation has the first version of its compliance framework ready, and has working groups on security and other matters.
Concerns about China and trade barriers.
China is one of the fastest growing markets, Asanovic said. In an interview, he said that RISC-V saw an explosion of activity in China after the controversy arose in which Arm had to decide whether to cut off relations with Huawei from China, after the US. UU. It will implement a commercial ban on national security concerns related to Huawei. Finally, Arm decided that it could continue licensing its chip architectures to Huawei, since the technology originated in the United Kingdom and not in the US. UU. The ban prevents US companies from working with Huawei.
But there are no such concerns with the open source hardware that is the basis of RISC-V, Redmond said. Patterson said Infineon's CEO once asked him if RISC-V technology could be blocked as a result of a hypothetical trade dispute. Because such concerns arose, the RISC-V Foundation is in the middle of moving its legal headquarters to Switzerland, which is considered a neutral territory. That helps eliminate any perception that RISC-V is a non-profit organization based in the USA. UU. All this concern about trade disputes has drawn a lot of attention to RISC-V, Asanovic said.
Martin Fink, an advisor to the CEO of Western Digital, said: "When we saw RISC-V, we saw the opportunity to achieve things that would not be possible with other solutions in the market." He said the ultimate goal of Western Digital was to unleash the main memory of its processor. He said Western Digital believed that processors did not have to be directly connected to the main memory chips.
It took Western Digital a few years to design its solution for a core with RISC-V. He launched the Swerv core a year ago and opened it open source.
"Before joining Western Digital, I had not heard of RISC-V," he said. “I was frustrated with the same things. All interfaces associated with the processor were blocked. In 2017, we were all. We are currently delivering one billion cores a year in our products, and we expect everyone to be RISC-V. ”
Ted Speers, head of architecture and planning at Microchip, said he realized RISC-V during a meeting in December 2014. He became and convinced himself that a colleague believed in it. In five years, he said RISC-V has provided an architectural alternative to innovate as Moore's Law slows. He said there is a flow of talent entering RISC-V through universities and venture capital for new RISC-V companies is also beginning to arrive.
Microchip created an RISC-V chip called PolarFire for microcontrollers. Speers said RISC-V is "making the hardware cool again." He added: "We are all excited because we know we are part of something big."
Junho Huh, vice president of research at Samsung Electronics, said the company has designed RISC-V on its Exynos and Isocell chips so far. Previous Exynos modem chips have been shipped in more than 600 million devices to date. It was a risk to use RISC-V, but the company expects to introduce RISC-V in a large number of products in the future, including AI, security and security chips, Huh said. Sure, it's just a research executive who says that. But over time, that could generate many new chips.
And that is what has Redmond smiling, as she says: "The new chips are where the growth in the market is."
SiFive has the largest family of RISC-V cores in the market, and has been evangelizing them worldwide. Yunsup Lee, SiFive's chief technology officer, said he was beaten at a SiFive symposium in Pakistan, where a student printed a copy of the first thesis written in RISC-V by Waterman. SiFive is moving towards consumer IoT, deep learning, industrial IoT and other markets.
Lee said: “We are changing the world. RISC-V has already changed it. The hardware is again great for students. "